June 27, 2012 (Wednesday) |
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| 7:30 AM - 9:00 AM
Registration |
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| 9:00 AM
- 10:00 AM |
OPENING SESSION |
9:00
- 9:15 |
Welcome Message
M.Nicolaidis (TIMA Lab), R.Canal (UPC), General Chairs
D.Gizopoulos (U Athens), X.Vera (Intel Barcelona Research Center), Program Chairs |
9:15
- 10:00 |
Keynote: Resilient Processors for Reliability and Energy Efficiency
Antonio Gonzalez (Director, Intel Labs, UPC, Barcelona) |
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| 10:00 AM - 10:20 AM
COFFEE BREAK |
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| 10:20 AM
- 11:40 AM |
Session 1 - SEU Tolerance |
1.1 |
Error Detection and Correction of Single Event Upset Tolerant Latch
Norhuzaimin Julai (School of Electrical,Electronic and Computer), Alexandre V Yakovlev (University of Newcastle upon Tyne), Alexander Bystrov (University of Newcastle Upon Tyne) |
1.2 |
SETTOFF: A Fault Tolerant Flip-Flop for Building Cost-efficient Reliable Systems
Yang LIN (University of Southampton), Mark Zwolinski (Univ. of Southampton) |
1.3 |
SEU Tolerant Robust Memory Cell Design
Shayan Mohammed (Indian Institute of Science), Virendra Singh (Indian Institute of Science (IISc)), Adit Singh (Auburn University), Fujita Masahiro (University of Tokyo) |
1.4 |
Single Event Upset Resilient Logic Design Optimization
Sujan Pandey (NXP Semiconductors) |
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| 11:40 AM - 12:00 PM
COFFEE BREAK |
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| 12:00 PM
- 1:00 PM |
Session 2 - Reconfigurable Logic |
2.1 |
SEU-X: a SEu Un-eXcitability prover for SRAM-FPGAs
Cinzia Bernardeschi (Department of Information Engineering, University of Pisa), Luca Cassano (), Andrea Domenici (Department of Information Engineering, University of Pisa) |
2.2 |
Analyzing and Alleviating the Impact of Errors on an SRAM-based FPGA Cluster
Arwa Ben Dhia (Telecom ParisTech), Lirida Naviner (Institut Telecom, Telecom ParisTech, CNRS LTCI), Philippe Matherat (Telecom ParisTech) |
2.3 |
Transparent Structural Online Test for Reconfigurable Systems
Mohamed Abdelfattah (Universität Stuttgart), Lars Bauer (Karlsruhe Institute of Technology (KIT)), Claus Braun (University of Stuttgart), Michael Imhof (Universitaet Stuttgart), Michael Kochte (University of Stuttgart), Hongyan Zhang (Karlsruhe Institute of Technology (KIT)), Joerg Henkel (University of Karlsruhe, Germany), Hans-Joachim Wunderlich (Universitat Stuttgart) |
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| 1:00 PM - 2:00 PM
LUNCH |
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| 2:00 PM
- 2:45 PM |
Special Session 1 – Embedded Tutorial: Online Security Monitoring for ICs
Miron Abramovici (Tiger’s Lair) |
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| 2:45 PM - 3:00 PM COFFEE BREAK |
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| 3:00 PM
- 4:00 PM |
Session 3 - Radiation Experiments and Analysis |
3.1 |
A Real-Case Application of a Synergetic Design-Flow-Oriented SER Analysis
Miguel Vilchis (LSI Corporation), Ramnath Venkatraman (LSI Corporation), Enrico Costenaro (iRoC Technologies), Dan Alexandrescu (iRoC Technologies) |
3.2 |
Fault-Based Reliable Design-On-Upper-Bound of Electronic Systems for Terrestrial Radiation Including Muons, Electrons, Protons and Low Energy Neutrons
Eishi Ibe (Hitachi, Ltd.), Tadanobu Toba (Hitachi, Ltd.), Ken-ichi Shimbo (Hitachi, Ltd.), Hitoshi Taniguchi (Hitachi, Ltd.) |
3.3 |
Neutrons Radiation Test of Graphic Processing Units
Paolo Rech (UFRGS), Caroline Aguiar (UFRGS), Ronaldo Ferreira (Universidade Federal do Rio Grande do Sul), Christopher Frost (ISIS), Luigi Carro (Universidade Federal do Rio Grande do Sul) |
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| 4:00 PM - 4:20 PM COFFEE BREAK |
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| 4:20 PM
- 5:20 PM |
Session 4 - Circuit Degradation |
4.1 |
The Influence of Clock-Gating On NBTI-Induced Delay Degradation
Jorge Semiao (Instituto Superior Engenharia - Universidade do Algarve), Jackson Pachito (University of Algarve), Celestino Martins (University of Algarve), Marcelino Bicho Dos Santos (IST/INESC-ID), Isabel Teixeira (INESC-id), Joao Paulo Teixeira (IST, Lisboa Technical University) |
4.2 |
Relation between HCI-induced performance degradation and applications in a RISC processor
Olivier Heron (CEA LIST), Clement Bertolini (CEA Saclay Nano-Innov), Nicolas Ventroux (CEA LIST), Fran�ois Marc (Universit� de Bordeaux 1) |
4.3 |
Do More Camera Pixels Result in a Better Picture?
Israel Koren (University of Massachusetts), Zahava Koren (University of Massachusetts at Amherst), Glenn Chapman (Simon Fraser U.) |
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| 5:20 PM - 5:50 PM COFFEE BREAK |
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| 5:50 PM
- 7:15 PM |
Special Session 2 � Panel: Cross Layer Reliability - Challenges and Standards Requirements
Organizers/Moderators: Michael Nicolaidis (TIMA), Shi-Jie Wen (Cisco) |
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| 8:00 PM WELCOME RECEPTION |
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| 9:00 AM
- 10:00 AM |
Session 5 - Memories and 3D Integration |
5.1 |
Low Power embedded DRAM Caches using BCH code Partitioning
Pedro Reviriego (Universidad Antonio de Nebrija), Alfonso Sancez-Macian (Universidad Nebrija), Juan Maestro (Universidad Nebrija) |
5.2 |
On the functional test of L2 caches
Matteo Sonza Reorda (Politecnico Di Torino), Ernesto Sanchez (Politecnico di Torino), Michele Riga (Politecnico di Torino) |
5.3 |
Through-Silicon-Via Built-In Self-Repair for Aggressive 3D Integration
Michael Nicolaidis (TIMA Laboratory), Vladimir Pasca (TIMA Laboratory), Lorena Anghel (TIMA Laboratory) |
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| 10:00 AM - 10:20 AM COFFEE BREAK |
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| 10:20 AM
- 11:20 AM |
Special Session 3 � Variability and Bugs: How to find them?
Organizer: P.Gupta (UCLA) |
S3.1 |
Measuring and Monitoring Variability
P.Gupta (UCLA) |
S3.2 |
Correlating Models and Silicon in the Presence of Variability
V.Chandra (ARM) |
S3.3 |
Effective Post-Silicon Validation
S.Mitra (Stanford U) |
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| 11:20 AM - 11:40 AM COFFEE BREAK |
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| 11:40 AM
- 12:40 PM |
Session 6 - Miscellaneous |
6.1 |
Test Access Mechanism for Chips with Spare Identical Cores
Ozgur Sinanoglu (New York University - Abu Dhabi) |
6.2 |
RIIF - Reliability Information
Adrian Evans (Cisco Systems Inc.), Dan Alexandrescu (iRoC Technologies), Enrico Costenaro (iRoC Technologies) |
6.3 |
On Line Monitoring of RF Power Amplifiers Output Power by means of Embedded Temperature Sensors
Josep Altet (Univ Politecnica de Catalunya), Diego Mateo (DEE - UPC), Didac G�mez (DEE - UPC) |
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| 12:40 PM - 1:40 PM LUNCH |
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| 1:40 PM
- 2:40 PM |
Special Session 4 � Panel: Reliability of hard real-time systems in 32nm and beyond: who will solve the challenges?
Organizer/Moderator: S.Hamdioui (Delft U) |
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| 2:40 PM
- 3:40 PM |
Session 7 - Posters |
7.1 |
A Fault Attack Robust True Random Number Generator
Eberhard Boehl (Robert Bosch GmbH), Jorge Merchan (Bosch), Markus Ihle (Bosch) |
7.2 |
Architectural Vulnerability Aware Checkpoint Placement in a Multicore Processor
Atieh Lotfi (University of Tehran), Arash Bayat (University of Tehran), Saeed Safari (University of Tehran) |
7.3 |
Built-In Test of MEMS Capacitive Accelerometers for Field Failures and Aging Degradation
Alvaro Gomez-Pau (UPC), Ricard Sanahuja (UPC), Luz Balado (UPC), Joan Figueras (UPC) |
7.4 |
Evaluation of Test Algorithms Stress Effect on SRAMs under Neutron Radiation
Georgios Tsiligiannis (lirmm), Luigi Dilillo (LIRMM), Alberto Bosio (LIRMM), Patrick Girard (LIRMM), Aida Todri (LIRMM), Arnaud Virazel (LIRMM), Antoine Touboul (IES/UM2), Frederic Wrobel (IES/UM2), Fr�d�ric Saign� (IES) |
7.5 |
Event-Driven On-Line Co-Simulation with Fault Diagnostic
Mikhail Baklashov (Intel Corporation) |
7.6 |
Fault Detection Capabilities of a Timing and Control Flow Checker for Hard Real-Time Systems
Julian Wolf (Universitaet Augsburg), Bernhard Fechner (Universitaet Augsburg), Theo Ungerer (Universitaet Augsburg) |
7.7 |
Fault Missing Rate Analysis of the Residue Number based Fault-Tolerant FIR Design
Zhen Gao, Wenhui Yang (Xiamen University), Xiang Chen (Tsinghua University), Ming Zhao (Tsinghua University), Jing Wang (Tsinghua University) |
7.8 |
Functional Level Embedded Self-Testing for Walsh Transform Based Adaptive Hardware
Ariel Burg (Bar-Ilan University), Osnat Keren (Bar Ilan University) |
7.9 |
Gatewaying IEEE 1149.1 and IEEE 1149.7 Test Access Ports
Francisco Fernandes (FEUP - Faculdade de Engenharia da Universidade do Porto), Ricardo Machado (FEUP - Faculdade de Engenharia da Universidade do Porto), Jose Ferreira (University of Porto), Manuel G. Gericota (ISEP) |
7.10 |
Neutron-Induced Soft Error Rate Estimation for SRAM Using PHITS
Shusuke Yoshimoto (Kobe university), Takuro Amashita (Kobe University), Masayoshi Yoshimura (Kyushu Univeristy), Yusuke Matsunaga (Kyushu University), Hiroto Yasuura (Kyushu University), Shintaro Izumi (Kobe University), Hiroshi Kawaguchi (Kobe University), Masahiko Yoshimoto (Kobe University) |
7.11 |
Pilot Symbol Driven Monitoring of Electrical Degradation in RF Transmitter Systems Using Model Anomaly Diagnosis
Sabyasachi Deyati (Georgia Institute of Technology), Aritra Banerjee (Georgia Tech), Abhijit Chatterjee (Georgia Institute of Technology) |
7.12 |
Reliable and Secure Memories Based on Algebraic Manipulation Detection Codes and Robust Error Correction
Zhen Wang (College of Eng. Boston University), Mark G. Karpovsky (College of Eng. Boston University) |
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| 4:00 PM SOCIAL EVENT (TOUR & DINNER) |
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| 9:00 AM
- 10:00 AM |
Session 8 - Secure Hardware |
8.1 |
Cross-level Protection of Circuits Against Faults and Malicious Attacks
Victor Tomashevich (U Passau), Sudarshan Srinivasan (UMass Amherst), Fabian Foerg (U Passau), Ilia Polian (University of Passau) |
8.2 |
Punctuated Karpovsky-Taubin Binary Robust Error Detecting Codes for Cryptographic Devices
Yaara Neumeier (Bar-Ilan University), Osnat Keren (Bar Ilan University) |
8.3 |
Stream Cipher Hash based Execution Monitoring (SCHEM) Framework for Intrusion Detection on Embedded Processors
Ameya Chaudhari (University of Texas), Jacob Abraham (University of Texas) |
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| 10:00 AM - 10:20 AM COFFEE BREAK |
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| 10:20 AM
- 11:20 AM |
Special Session 5 - Future Reliability Solutions: New Applications and New Devices
Organizer: D.Gizopoulos (U Athens) |
S5.1 |
Algorithmic Techniques for Robust Applications
Rakesh Kumar (U Illinois, Urbana-Champaign) |
S5.2 |
FinFET Technology for Memories: pros and cons
Ramon Canal (UPC) |
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| 11:20 AM - 11:40 AM COFFEE BREAK |
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| 11:40 AM
- 1:00 PM |
Session 9 - Soft Errors Analysis and Tolerance |
9.1 |
An Efficient Probability Framework for Error Propagation and Correlation Estimation
Liang Chen (Karlsruhe Institute of Technology), Mehdi Tahoori (Karlsruhe Institute of Technology) |
9.2 |
Logic Masking for SET Mitigation Using Approximate Logic Circuits
Antonio Sanchez-Clemente (Universidad Carlos III), Luis Entrena (Universidad Carlos III), Mario Garcia Valderas (Universidad Carlos III de Madrid), Celia Lopez-Ongil (Universidad Carlos III de Madrid) |
9.3 |
Towards Optimized Functional Evaluation of SEE-Induced Failures in Complex Designs
Dan Alexandrescu (iRoC Technologies), Enrico Costenaro (iRoC Technologies) |
9.4 |
SEU Sensitivity of Robust Communication Protocols
Celia Lopez-Ongil (Universidad Carlos III de Madrid), Marta Portela-Garcia (Universidad Carlos III de Madrid), Mario Garcia Valderas (Universidad Carlos III de Madrid), Anna Vaskova (Carlos III University of Madrid), Luis Entrena (Universidad Carlos III), Alberto Martin (National Institute of Aerospace Techniques), Ignacio Arruego (National Institute of Aerospace Techniques), Javier Martinez Oter (National Institute of Aerospace Techniques) |
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| 1:00 PM
- 1:30 PM |
Symposium Closing Remarks |
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| 1:30 PM - 2:30 AM LUNCH |
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